This invention relates to semiconductor devices and is particularly applicable to bipolar devices.
It is common to provide a large number of bipolar transistors on a silicon chip, but it is often desired that the bipolar transistors have different operating characteristics, some having a higher frequency performance and some having a higher reverse bias capability for example.
It has proved difficult selectively to adjust the characteristics of different transistors when they are manufactured on a single chip, and the present invention seeks to provide an improved semiconductor device.
According to this invention, a semiconductor device includes a plurality of bipolar transistors formed in a body of silicon, each transistor having a collector and an emitter with a base region positioned therebetween, the transistors having a collector or an emitter lying in a common plane buried within said body, at least one transistor of which has its emitter or collector positioned at an outer planar surface of said body, and at least one transistor of which has its emitter or collector positioned in a recess below said planar surface, said recess being formed by local sacrificial oxidation of the silicon.
Preferably, the body of silicon comprises a silicon substrate carrying a silicon epitaxial layer, in which case the buried plane is at the interface between the substrate and the epitaxial layer.
The body of silicon is not wholly silicon as it contains dopants which act as conductivity modifiers, and may contain small quantities of a lattice modifier such as germanium.
The bipolar transistors may be all pnp or npn, but said body of silicon may contain both pnp and npn transistors, ie it is a so-called complementary device.
According to a second aspect of this invention, a method of making a semiconductor device which comprises a plurality of bipolar transistors formed in a body of silicon, each transistor having a collector and an emitter with a base region positioned therebetween, the transistors having a collector or an emitter lying in a common plane buried within said body, at least one transistor of which has its emitter or collector positioned at an outer planar surface of said body, and at least one transistor of which has its emitter or collector positioned in a recess below said planar surface, includes the step of forming the recess by local sacrificial oxidation of the silicon.
Preferably, the base region is contiguous with whichever of the emitter or collector is positioned at the surface of the silicon body.
The collector or emitter which is positioned at said common plane is preferably formed in a region at which conductivity modifying dopants are introduced into the surface of the silicon substrate surface prior to the growth of the epitaxial layer. During growth of the epitaxial layer the buried collector or emitter, as the case may be, will diffuse into the epitaxial layer, but preferably does not extend to the base region, so that the base region is separated from the buried collector or emitter by a region of epitaxial silicon, which is lightly doped so as to be conductive but with a high resistivity.